The present invention relates to interface devices in which the format of an input signal is converted and temporarily stored in memory for subsequent reading out. More particularly, the invention relates to interface devices for the translation of a video data output signal from a computer which is intended for display on a cathode ray tube into a signal which is suitable for use with liquid crystal displays (LCD).
A known block data transfer circuit utilizes direct memory access and a cycle steal circuit for converting data signals from one format to another. However, in direct memory access block data transfer, the data cannot be read while it is being written into random access memory, nor can it be read when it is being transferred out. For example, even for data format conversion, data cannot be read while it is being written into memory and the data output for forming the display cannot be transferred to the display device. Thus, during that time, data cannot be correctly displayed on the screen. When cycle steal circuits are used, the reading and outputting of the memory are synchronized with the write cycle and the transfer rate of the output signal is limited by that of the input signal and an adequate selection of rates is not available.